Forum Discussion
Altera_Forum
Honored Contributor
13 years agoI usually make everything (both file conversion and programming) with the attached script file. This is faster and safer than the gui tools.
Simply change fpga and nios project names and epcs base address according to yours and run it in the Nios shell window. If this won't work, you must identify where your problem is. First of all make sure fpga configuration has been loaded from flash and it is operational: 1. check conf_done pin 2. use a counter to blink a led or any other output pin, or add some trivial logic in order to recognize the fpga has been correctly configured In most cases the problem is with the next step: Nios bootloading. Check if the correct bootloader has been included in Quartus project (you should have a epcs_controller_boot_rom.hex file here). Another common issue is a wrong reset address in Nios configuration, but you already checked this point. Another problem can arise if your code sections are distributed across different memory devices (i.e. sdram, sram, onchip ram). When you load and debug with jtag, the debugger takes care of directly loading all memory sections with the proper code, while in the flash boot case this task must be accomplished by the bootloader or manually. You may need to call ALT_LOAD_SECTION_BY_NAME(<section_name>) in the very beginning of your main().