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RJoy01's avatar
RJoy01
Icon for New Contributor rankNew Contributor
6 years ago

System hangs while testing Intel FPGA P-Tile Avalon Memory Mapped (Avalon-MM) IP for PCI Express Design Example User Guide example design

STRATIX 10DX DEC KIT Here we have used Intel FPGA P-Tile Avalon Memory Mapped (Avalon-MM) IP for PCI Express Design Example User Guide example design for testing. when we tried to run the DMA using...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

I tested v19.4 design example, and I've encountered the same problem as you reported here. Therefore, I will feedback it to the Intel PSG engineering team to resolve the problem. For the moment, I attached the v19.3 sof file for you to perform a quick test, it can run the DMA test without hang, where the link test and memory read/write test are actually not supported here.

Regards -SK

RJoy01's avatar
RJoy01
Icon for New Contributor rankNew Contributor
6 years ago

Thanks

By using the SOF file you shared ,DMA operation work properly when i reduce the descriptor count