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RJoy01
New Contributor
New ContributorSystem hangs while testing Intel FPGA P-Tile Avalon Memory Mapped (Avalon-MM) IP for PCI Express Design Example User Guide example design
STRATIX 10DX DEC KIT Here we have used Intel FPGA P-Tile Avalon Memory Mapped (Avalon-MM) IP for PCI Express Design Example User Guide example design for testing. when we tried to run the DMA using...
SengKok_L_Intel
Regular Contributor
Regular ContributorHi,
Is the links test 100 read & write passed? Could you please reduce the number of descriptors per DMA, or number of Dwords per descriptor to see if this make any difference?
Regards -SK
RJoy01New Contributor
New Contributor+Varun M R <[email protected]> +Rahul K V <[email protected]>
