System hangs while testing Intel FPGA P-Tile Avalon Memory Mapped (Avalon-MM) IP for PCI Express Design Example User Guide example design

*********************************************************

Intel FPGA PCIe Link Test

Version 2.0

0: Automatically select a device

1: Manually select a device

*********************************************************

> 0

Opened a handle to BAR 0 of a device with BDF 0x100

*********************************************************

0: Link test - 100 writes and reads

1: Write memory space

2: Read memory space

3: Write configuration space

4: Read configuration space

5: Change BAR for PIO

6: Change device

7: Enable SRIOV

8: Do a link test for every enabled virtual function

belonging to the current device

9: Perform DMA

10: Quit program

*********************************************************

> 5

Changing BAR...

Enter BAR number (-1 for none):

> 2

Successfully changed BAR!

*********************************************************

0: Link test - 100 writes and reads

1: Write memory space

2: Read memory space

3: Write configuration space

4: Read configuration space

5: Change BAR for PIO

6: Change device

7: Enable SRIOV

8: Do a link test for every enabled virtual function

belonging to the current device

9: Perform DMA

10: Quit program

*********************************************************

> 2

Enter address to read, in hex:

> 0x4

Reading from BDF 0x100 BAR 0x2 offset 0x4..

Read 0

*********************************************************

0: Link test - 100 writes and reads

1: Write memory space

2: Read memory space

3: Write configuration space

4: Read configuration space

5: Change BAR for PIO

6: Change device

7: Enable SRIOV

8: Do a link test for every enabled virtual function

belonging to the current device

9: Perform DMA

10: Quit program

*********************************************************

> 1

Enter address to write, in hex:

> 0x4

Enter 32-bit data to write, in hex:

> 0xaabb

Writing 0xaabb at BDF 0x100 BAR 0x2 offset 0x4..

Wrote successfully!

*********************************************************

0: Link test - 100 writes and reads

1: Write memory space

2: Read memory space

3: Write configuration space

4: Read configuration space

5: Change BAR for PIO

6: Change device

7: Enable SRIOV

8: Do a link test for every enabled virtual function

belonging to the current device

9: Perform DMA

10: Quit program

*********************************************************

> 2

Enter address to read, in hex:

> 0x4

Reading from BDF 0x100 BAR 0x2 offset 0x4..

Read 0xffffffff

*********************************************************

0: Link test - 100 writes and reads

1: Write memory space

2: Read memory space

3: Write configuration space

4: Read configuration space

5: Change BAR for PIO

6: Change device

7: Enable SRIOV

8: Do a link test for every enabled virtual function

belonging to the current device

9: Perform DMA

10: Quit program

*********************************************************

> 10

AFTER REBOOT

vvdn@vvdn-hp:~$ sudo md.l f0210004

f0210004: 0000aabb 00000000 00000000 00000000 ................

f0210014: 00000000 00000000 00000000 00000000 ................

f0210024: 00000000 00000000 00000000 00000000 ................

f0210034: 00000000 00000000 00000000 00000000 ................

f0210044: 00000000 00000000 00000000 00000000 ................

f0210054: 00000000 00000000 00000000 00000000 ................

f0210064: 00000000 00000000 00000000 00000000 ................

f0210074: 00000000 00000000 00000000 00000000 ................

f0210084: 00000000 00000000 00000000 00000000 ................

f0210094: 00000000 00000000 00000000 00000000 ................

f02100a4: 00000000 00000000 00000000 00000000 ................

f02100b4: 00000000 00000000 00000000 00000000 ................

f02100c4: 00000000 00000000 00000000 00000000 ................

f02100d4: 00000000 00000000 00000000 00000000 ................

f02100e4: 00000000 00000000 00000000 00000000 ................

f02100f4: 00000000 00000000 00000000 00000000 ................