Open Side Menu
Skip to contentAltera Community
Forums
BlogKnowledge BaseAltera.com
RegisterSign In
  1. Altera Community
  2. Forums
  3. Boards & Dev Kits

Forum Discussion

smeng12's avatar
smeng12
Icon for New Contributor rankNew Contributor
6 years ago

Stratix10器件中,与部分重配置的DATA[15:0]管脚和初始化的AVST_DATA是复用管脚吗

YuanLi_S_Intel's avatar
YuanLi_S_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

是的。可以用给I/O。

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/stratix-10/pcg-01020.pdf (第八页)​

Recent Discussions

  • nhadzic's avatar
    Proper PERST# connection for FMC on Agilex5 Modular Development Kit
    Solved
    12 hours ago
    nhadzic
  • Jan's avatar
    Workaround for TCK frq. limitations on USB-Blaster I/II/III & Clones (fixing "JTAG chain broken")
    13 hours ago
    Jan
  • TeroS's avatar
    Rev B Arria 10 development kit
    13 hours ago
    TeroS
  • ggoverdh's avatar
    Agilex 5 E-Series 065B Premium Dev Kit - is FPGA_3V3_SDA/SCL driven by an HPS I2C controller?
    1 day ago
    ggoverdh
  • WeihanT_Altera's avatar
    Introducing the Altera Community AI Responder — Beta
    2 days ago
    WeihanT_Altera
Contact Us
Altera YoutubeAltera YoutubeAltera Twitter
  • Company Overview
  • Newsroom
  • Our Leaders
  • Careers
Subscribe to Altera Newsletter

© Altera Corporation | Terms of Use | Privacy Policy | Cookies | Trademarks | PSIRT

Altera Logo