Forum Discussion
Altera_Forum
Honored Contributor
11 years agoHi Paul,
--- Quote Start --- This would be a separate issue. I have posted it in another forum but no reply yet. --- Quote End --- I guess I didn't see it :) --- Quote Start --- I am following the example tutorial "Using the SDRAM on Altera’s DE2 Board with Verilog Designs" using Qsys. I have built the system and loaded it to the FPGA. I am using the DE0-Nano board again. How exactly can I test the DDR2 controller in this case? I see only an example on how to test the switches and LEDs there. --- Quote End --- The DE0-nano has SDRAM, not DDR2 ... so your question is inconsistent ... With DDR memory, the controller is quite complicated and requires calibration of the interface timing. This can be performed using the Transceiver Toolkit. I'm sure your Stratix V board uses DDR2, so I can send you a document on how to create a system that includes the logic required to use the Transceiver Toolkit. The SDRAM memory on the DE0-nano has static timing requirements. So long as the design includes the correct .sdc file, and it passes timing, then you can just use it. You can test it using a pattern generator and checker, and DMA controller to move data back and forth, or you can just create a really basic test, and read/write. --- Quote Start --- I would like to be able to write data to the on-board RAM through the controller from the FPGA and read it back etc. Do I have to worry about all the control signals or will the controller take care of that itself? In order to write data to an address in RAM, how would one go about it? --- Quote End --- The controller takes care of the timing. You should also be able to create a simulation of the system and include a memory model and read/write that fake memory. If you get that working, then you'll feel a lot more confident things work. I have a favor to ask ... Do you have any QSFP+ cables for your board yet? I would like to see what the eye pattern measurements are like on the Bittware board. If you have a cable, I can write the top-level HDL, and you can run the test. That way you'll get a working design, and I'll get the test results I want to see, and then I can decide whether I should get one of the Bittware boards. Cheers, Dave