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elrhod's avatar
elrhod
Icon for New Contributor rankNew Contributor
2 years ago
Solved

Stratix 10 HPS - CoreSight Embedded Trace Macrocell Base Address

Hi all, I have been looking for the base address of the Stratix 10 HPS ETM for a couple of days already and cannot find it. As you can see bellow, at the Stratix 10 HPS TRM we can find the CoreSigh...
Fpga Devkit
  • tehjingy_Altera's avatar
    tehjingy_Altera
    2 years ago

    Hi Eduardo


    The Embedded Trace Macrocell Address Registers are not listed for users to read/write.

    From the information I got is that they are strictly for tool usage.

    The debugger tool will access to those registers through their internal ROM table and read/write accordingly.

    We do not need to read/write to the registers.


    Regards

    Jingyang, Teh


tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi


Since a solution have been provided and no feedback was received, I shall set this thread to close pending. If you still need further assistance, you are welcome reopen this thread within 20days or open a new thread, some one will be right with you. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


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Regards

Jingyang, Teh