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Junyong's avatar
Junyong
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Stratix 10 - 1G/2.5G Ethernet Design Example for Stratix10 Tx Signal Integrity Dev Kit

Hi all, I downloaded the design example file below from Intel design store. "Stratix 10 - 1G/2.5G Ethernet Design Example" I'm currently working with Stratix 10 Tx signal integrity Dev Kit. After...
Fpga Devkit
ZiYing_Intel's avatar
ZiYing_Intel
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi junyong,


Since no hear any feedback from you, I am now close the case. If you have any question after the case closed, please do feel free to submit another issue.


Best regards,

zying