Startix-III DSP kit, RAM dropping samples

where does your "clock" signal come from? If it isn't perfectly synchronized with the ADC clock you may loose some signals.

If you are reading the memory contents while your design is still writing in memory then you'll get bad data, probably a mix of old and new samples, and this could explain what you see. You would need to stop writing to the memory once you've reached the last address, and only then read the memory contents.