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Altera_Forum
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16 years ago

SSRAM (IS61LPS25636A)) on Cyclone III starter board

I am trying to read a bunch of data from SSRAM (IS61LPS25636A)) on Cyclone III, which is 256k*32 bit in size. However, from the board manual, there are 32 data bits, 21 address bit (should be 18 bits...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Yes, I took care of the reset_n, and used a inverter before reset_n on the button on FPGA.

clk and ssram_clk are related as they are the pll outs from single master clk(50MHz).

Thanks.

I can send you all the project source if you are interested. It's about 20 M.

My msn:[email protected]