SRAM K1B3216B2E on Cyclone III Development Kit

I've put these constraints, but I'm not sure they are necessary, as it is an asynchronous interface and the setup and hold times on the SOPC component are larger than the actual requirements of the SRAM.

create_clock -name {clkin_50} -period 20 -waveform { 0 10 } 
set_input_delay -clock clkin_50 -max 15 }]
set_input_delay -clock clkin_50 -min 0 }]
set_output_delay -clock clkin_50 -max 15  fsa sram_ben sram_csn sram_advn sram_oen sram_wen sram_psn sram_clk}]
set_output_delay -clock clkin_50 -min -4  fsa sram_ben sram_csn sram_advn sram_oen sram_wen sram_psn sram_clk}]

Downloading the software in SRAM through the IDE doesn't fully test the memory. Have you tried to compile the "memory test" design example in on-chip RAM, and have it test the SRAM?

Does your "hello word" program work from on-chip memory?