Forum Discussion
Altera_Forum
Honored Contributor
17 years agoThe only signals I have shared are data and address. I only had one bit to remove from the address bus (see attached picture), but it may be different than your system because I don't use the flash at all.
If you used some of Altera's design example projects as a start, some data pins are not connected properly. See this message (http://www.alteraforum.com/forum/showthread.php?t=2609) and change your assignments accordingly, if required. I think that you should start with a very simple SOPC system, with only what's necessary for a memory test (CPU, big on-chip memory, SRAM, JTAG UART, System ID). Then compile the memory test example, run it from the on-chip memory, and ask it to test the SRAM. Then you should be able to see if it fails completely or partially. If you still can't understand what's going on, use a SignalTap probe to check the SRAM signals.