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giomate's avatar
giomate
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5 years ago

SPI-3-wire SPI_CS pin Configuration

Hi there, Im need to configurate a SPI interface on a Cyclone V. On the deplyment, i did some measurements and i noted that the SPI_SS_N is not toggling, no matter which flags i use. int_result=...
BoonBengT_Altera's avatar
BoonBengT_Altera
Icon for Moderator rankModerator
5 years ago

Hi @giomate,


Thank you for posting in Intel community forum and hope this message find you well.
If i understand the situation correctly, I would recommenad that the following design example might be helpful to your needs.

https://www.intel.com/content/www/us/en/programmable/support/support-resources/design-examples/intellectual-property/embedded/nios-ii/exm-spi-bridge.html

Please do refer to the 'SPI_Bridge_Design_Example.zip', within the nios2 project there is a references C code to write and read to onchip memory connected via SPI for further details.

Warm regards.
BB

  • BoonBengT_Altera's avatar
    BoonBengT_Altera
    Icon for Moderator rankModerator
    5 years ago

    Hi @giomate,

    Good day, just checking in by any chances did you managed to look into the recommendation above.

    Please do let us know if you have any difficulties doing so.

    Thank you.

    Warm regards

    BB

    • giomate's avatar
      giomate
      Icon for New Contributor rankNew Contributor
      5 years ago

      hi BoonBeng,

      thanks for your support,

      at the moment , i got the spi working , when i modified the general SPI transfer function on that way:

      void SPI_Handler::Open(void){

      IOWR_ALTERA_AVALON_SPI_CONTROL(base_address, ALTERA_AVALON_SPI_CONTROL_SSO_MSK);

      }

      void SPI_Handler::Close(void){

      IOWR_ALTERA_AVALON_SPI_CONTROL(base_address, 0);

      }

      void SPI_Handler::SEN(bool sen){

      if(sen){

      IOWR_ALTERA_AVALON_SPI_CONTROL(base_address, 0);

      }else{

      IOWR_ALTERA_AVALON_SPI_CONTROL(base_address, ALTERA_AVALON_SPI_CONTROL_SSO_MSK);

      }

      }

      however, on higher baudrates(SPI_ADF5610_TARGETCLOCK >4000000u), something is not working...

      So , if the system is 80 MHz, how fast can run the SPI?

      • BoonBengT_Altera's avatar
        BoonBengT_Altera
        Icon for Moderator rankModerator
        5 years ago

        Hi @giomate,

        Per my understanding, the SPi core is design to transfer single data word at a time.
        As for the baud rates selection between clock, perhaps you can look at the relationship here.
        Hope that helps.

        Warm regards
        BB