Honored ContributorHi,
anyone of you knows, what is the speed grade of the Cyclone III on the Starter Kit DK-START-3C25N or where to find the information? I want to connect a Texas Instruments ADS6444 Evaluation Module (100 MHz 14 bit) to the HSMC and gain experience in using LVDS at 350 MHz "DDR" connection. The minimum speed grade needed for 350 MHz "DDR" LVDS is C7. Would you suggest to rely on that information? Thanks.
Honored Contributorcheck the BOM which is an Excel file in the board_design_files/assembly directory
it says its a C6 deviceHonored Contributordocuments/tutorials/hardwaretutorials/my_first_fpga_tutorial.pdf says:
page 1–16, Table 1–2. Speed Grade Settings, Cyclone III Starter Board: 8 also in documents/Cyc III FPGA Starter Board Reference Manual: C8 I would be pleased if it were the happy medium C7 ;)Honored Contributori checked one i have here in the form of a NEEK, its a C6
from what i've been told the schematic and BOM are supposed to be accurate since they are used in manufacturing of the kitsHonored Contributorseems like i was wrong, i found a kit with a C8
looks like checking the actual part on the kit is your best betHonored ContributorI got also answers from Altera's support. They said: "The speed grade of the FPGA on the development board (DK-START-3C25N) is C8 (Sped Grade 8)".
Finally i bought one from Digikey and got a C6 on it, although explicitly ordered an C7. :( Thanks all!
