Specify clock frequency for CycloneII FPGA

It sounds like you are looking at the output from the timing analyzer.

This tells you the maximum clock frequency that your design will correctly operate under.

You must have specified a clock in your top level component.

Can you attach an image of where you have seen this clock mentioned and maybe a copy of your code for the top level?

There is no such concept as an internally generated clock in an FPGA. There must be an external clock source