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Honored Contributor
Honored ContributorSOPC with SDRAM Contoller
Hy everyone, I am new in building SOPC. Here is my objection : creating SOPC with SDRAM to write a simple Hello world on NIOS II by using DE0 development board. I got an error message from NI...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- - run from onchip memory and perform a sdram test by writing and reading back data --- Quote End --- If your suggestion is same as I thought on the above picture, I have tested it. Error : verifying 00800000 ( 0%)
verify failed between address 0x800000 and 0x801ff3
leaving target processor paused The error ending address is keep on changing :cry: What if there are a little difference in the shift phase?(for example : 0.1ns of difference) will it be any error ?
