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Do you mean that I cant separate the clock for CPU and the clock for SDRAM?
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You can use a separate clock for sdram with same or different frequency.
I meant you however need a separate clock for driving the external sdram clock pin, because you must apply the phase shift.
So, in a general case you have 3 clocks:
- cpu_clk
- sdram_clk, connected to sdram controller inside sopc builder
- sdram_ext_clk, same freq as sdram_clk but -1.5ns phase shifted; this only connects outside to sdram clk pin.
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I made a calculation based on the formula on the user guide, which lead to -1.46 ... and do you mean
minus 1.5ns?
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Yes. Minus means a phase lead as I told you.
So my -1.5 guess was good!
Honored Contributor
