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Honored Contributor
Honored ContributorSOPC with SDRAM Contoller
Hy everyone, I am new in building SOPC. Here is my objection : creating SOPC with SDRAM to write a simple Hello world on NIOS II by using DE0 development board. I got an error message from NI...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Inside sopc builder, use the same CPU_clk for sdram, too. While SDRAM_clk will be only used externally to connect to the actual sdram chip clock pin. --- Quote End --- Do you mean that I cant separate the clock for CPU and the clock for SDRAM? I did search for this requirement and it's needed to be separated from the information I have gathered :confused: --- Quote Start --- This SDRAM_clk will need a phase shift, in order to meet timing requirements: usually a 1.5ns phase lead relative to CPU_clk is good in most situations. --- Quote End --- I made a calculation based on the formula on the user guide, which lead to -1.46 ... and do you mean minus 1.5ns? Thank you, Yuyex:o
