SoC Cyclone V : Configure FPGA fabric SPI Flash from HPS ?

Question

Hello,We need to update the SPI Flash used to configure the FPGA fabric of a Cyclone V SoC but the only communication channel available is the ethernet interface.We can upload the configuration to an external RAM memory.Is it possible to access this SPI Flash memory directly or with a reconfiguration of the FPGA fabric ?For information, because we use a SPI flash, the MSEL pins configuration doesn't allow the FPGA manager to reconfigure the FPGA fabric.Any help appreciated.Regards,WabG

aikeu · Answer

Hi WabG,Are you able to load the image from sdcard using the below in order to reconfigure the FPGA fabric?load mmc 0:1 ${loadaddr} ghrd_10as066n2.core.rbffpga load 0 ${loadaddr} ${filesize}Thanks.Regards,Aik Eu

wabg · Answer

Aik Eu,From the Linux's console, I don't have the commands "load" neither "fpga" but this last command seems to use the FPGA manager. I have tried to use the FPGA manager with the "dd" command as described in the figure below :As the board use an SPI flash to configure the FPGA fabric, the MSEL setting doesn't allow the FPGA manager to configure the FPGA fabric.Instead of the FPGA manager would it be possible to use the SCAN manager to access the JTAG-TAP controller to configure the SPI flash ?Regards,WabG

fvm · Answer

Hi,there's no direct access from HPS to FPGA SPI flash. I see two options:- Implement SPI controller in FPGA fabric and access it through HPS-FPGA bridge. Requires a factory image programmed through JTAG programmer.- Perform .jic programming from HPS through SCAN manager. Don't know if there are ready-to-use software examples.

wabg · Answer

Hi,We are thinking about the 2nd solution because we don't have access to the JTAG.Below would be the solution principle where we use OpenOCD to read the rbf file /send JTAG commands and a custom gateway to capture the OpenOCD command through a virtual port :Does it looks feasible, any remarks ?Regards,WabG