SIV PCIe high performance ref design data can arrive out of order

Hi Kevin,

Thanks for the swift reply.

I can understand that multiple outstanding requests could be dealt with out of order to eek out the best performance, but I wonder if they could be dealt with atomically i.e. once it starts pumping out data for a particular tag_id, it can only provide data for that tag until completed, even if a few clock cycles are unused.

Looks like I'll have to delve into the ref design more deeply rather than just using it!

Cheers,

Dwayne