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ABola2's avatar
ABola2
Icon for New Contributor rankNew Contributor
6 years ago

single bit error in 7 bits ECC not detected, cyclone V FPGA.

i have checked single bit ECC error detection and correction in SRAM IP.

Getting error during write into memory {via encoder logic} and detection shall happen on the read from memory {via decoder logic}.

By injecting single bit error on 7 bit ECC and read the data, i do not see single bit error getting detected.

1 Reply

  • FawazJ_Altera's avatar
    FawazJ_Altera
    Icon for Frequent Contributor rankFrequent Contributor
    6 years ago

    Hello,

    Please make sure there is no timing violations. there might be some rare cases where there is a corrupted memory location that might cause this issue.

    thank you