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Aidin-P2D's avatar
Aidin-P2D
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Simple ISSP Enable Loopback

Hi, I am trying to understand and test loopback Transceivers in Cyclone V. I found a video posted by Altera which it appears a good starting point. However, I am unable to find the design example me...
Board Debug
Kshitij_Intel's avatar
Kshitij_Intel
Icon for Frequent Contributor rankFrequent Contributor
2 years ago

Hi,

Can you please answer below questions?

  1. Which Operating system you are using?
  2. Which Quartus Software version you are using?
  3. Which device (OPN) you are targeting?
  4. Which FPGA Development Kit you are using?

I am sharing one demo design, please go through it.

Thank you,

Kshitij Goel

  • Aidin-P2D's avatar
    Aidin-P2D
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    Hi,

    Many thanks for getting back to me. please see below information you requested

    1. Windows 10 Pro Version 22H2 OS Build 19045.3803

    2. Quartus Prime Version 22.1std.0 Build 915 10/25/2022 SC Lite Edition

    3. Cyclone V: 5CGTFD9E5F35C7

    4. Cyclone V GT Development Kit Board

    please let me know if you need further info.

    Regards

    Aidin.