Forum Discussion
Signaltap waiting for clock on PCIe example design
- 2 years ago
Hi Wincent,
Finally narrowed down the issue.
Issue was that the Switch selection option for PCIe reference clock mentioned in Intel/Altera AGF027 dev kit user guide was incorrect and this led to the clock buffer put in wrong input mode.
Below is screenshot from User Guide.
Switch 4.3 should be set to OFF to receive local clock. As you can see the documentation suggests setting to be ON to receive local clock.
Could you please feed this back to the corresponding documentation team within Intel/Altera to get this updated?
Thanks
Binu
Hi Wincent,
Finally narrowed down the issue.
Issue was that the Switch selection option for PCIe reference clock mentioned in Intel/Altera AGF027 dev kit user guide was incorrect and this led to the clock buffer put in wrong input mode.
Below is screenshot from User Guide.
Switch 4.3 should be set to OFF to receive local clock. As you can see the documentation suggests setting to be ON to receive local clock.
Could you please feed this back to the corresponding documentation team within Intel/Altera to get this updated?
Thanks
Binu
- Wincent_Altera2 years ago
Regular Contributor
Hi Binu,
Glad that you find the solution, also thanks for sharing with me.
I will feedback to the related team to cross check on this and proceed to update.
Regards,Wincent_Intel