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BMart12's avatar
BMart12
Icon for Occasional Contributor rankOccasional Contributor
4 years ago
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SignalTap Logic Analyzer waveform display

Hello, I am using the SignalTap II logic analyzer on Quartus Prime Version : 18.1.1 Build 646 04/11/2019 SJ Standard Edition. I am tracing logic in the Cyclone V SOC. The logic under analysis use...
  • sstrell's avatar
    sstrell
    4 years ago

    Any clock in the design can be used as the sampling clock. Typically, you'll use the clock for the logic you are looking at, but there is nothing stopping you from using a faster clock to get better sampling resolution. If you're sampling clock is 200 MHz, then yes, each sample is 5 ns.

sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
4 years ago

Any clock in the design can be used as the sampling clock. Typically, you'll use the clock for the logic you are looking at, but there is nothing stopping you from using a faster clock to get better sampling resolution. If you're sampling clock is 200 MHz, then yes, each sample is 5 ns.