Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Signals distorted by the Stratix II EP2S180 Dsp Board

Hello!

I'm trying to visualize signals generated from my EP2S180 Dsp Board after implementing a design into the FPGA.

When implementing a simple sinusoidal signal of about 50Hz, I obtain at one of the DACs outputs a sine wave of about 1 MHz with a maximum of 2v peak to peak.

Questions: I have read that the board has an input cut-off frequency of 1Mhz.

1- Is there any output bandwidth? (For now, no signal is injected at the ADCs)

2- What is the reason of this frequency shifting?

Thanks for your answers!

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    --- Quote Start ---

    I have read that the board has an input cut-off frequency of 1Mhz.

    --- Quote End ---

    I think, it's Altera's duty to specify the product. As far as I see, the transformer coupling of AD and DA interfaces isn't even mentioned in the User Guide. The parts itself (from Mini-Circuits) have a 0.4 MHz/-3 dB high-pass cut-off. So a 50 Hz signal can't cross it. But that's no reason to get a near full-scale 1 MHz signal, there's most likely a signal generation or DAC connection bug in the design. The factory design (sum of 1.25 + 12.5 MHz sine) should work correctly.