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fa_fpga_enthusiast's avatar
fa_fpga_enthusiast
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Routing HPS Peripheral pins through FPGA on Agilex-7 SoC: Validation and Software Consideration

Dear Intel support, We are making progress in developing our design using the Intel Agilex-7 (DK-SI-AGI027FA) evaluation board. The evaluation board includes three distinct daughter cards that can b...
Fpga Devkit
tehjingy_Altera's avatar
tehjingy_Altera
Icon for Regular Contributor rankRegular Contributor
2 years ago

Hi

Thanks for contacting us.

Yes, all the peripherals in the dedicated HPS IO bank could be routed through the FPGA.

You could go to the HPS parameter tab>>Pin Mux and Peripherals >> Advanced >> Advanced FPGA Placement.

On boot up the SDM will be responsible to load the FPGA configuration and does not require the linux to be loaded to load the FPGA configuration.

https://cdrdv2-public.intel.com/790902/ug-ag-config-683673-790902.pdf