Forum Discussion
Deshi_Intel
Regular Contributor
5 years agoHi Andrea,
Pls see my comment below.
- Is there any way to use simple double data rate IO in a cyclone 10 ?
- I presume you are Altera veteran user that's familiar with WYSIWYG or megawizard usage model.
- Yet, the design practice has changed. Right now we only recommend customer to use IP core and not some low level design instance anymore to avoid breaking Quartus design compilation flow.
- The replacement IP for DDIO in Cyclone 10 GX device is indeed GPIO IP.
- Regarding RGMII support on Cyclone 10 FPGA
- Unfortunately as explained in the KDB link that you found out as well, RGMII can't be supported anymore on Cyclone 10 GX due to FPGA GPIO circuit architecture changes
- We can only advise customer to switch to GMII or SGMII
I apologize for the inconvenience and appreciate your understanding at the same time.
Regards,
dlim