Read then Write data on SRAM DE2 board

This code is not how you would write and read an SRAM device.

Interfacing to SRAM requires adhering to the data sheet timing waveforms for read and write. For example, there is a PDF in this thread that shows the waveforms:

http://www.alteraforum.com/forum/showthread.php?t=31457

There is also some code in a zip file. Its not exactly the code that you need (since that would be too easy), but its enough to get you started.

If given the task to read/write an SRAM location, I would recommend implementing an Avalon-MM slave SRAM interface (or using Altera's existing IP), and then perform Avalon-MM master read/write accesses. The Avalon-MM master access logic is trivial to write, and the timing complexity of the SRAM is hidden from your master logic. The master could also perform read/write access to on-chip FPGA RAM, and the logic does not need to change.

You should also learn how to use Modelsim. Cypress and other SRAM manufacturers have SRAM models written in VHDL that you can use to test your controller logic. It does not matter whether or not the model matches the exact part number on your board, as you controller should be written such that the timing can be configured, eg., via generics.

Cheers,

Dave