Question about FPGA I/O interfacing on Dev Kits

I don't have your board schematics, nor I know what type of interface is used there, so I only can make some guesses.

There are more reasons for which the designer may want to add a 'level shift' inferface,

besides actually shifting voltage levels.

First of all it could serve as a buffer, in order to drive a current higher that that provided

by fpga I/Os. Or it could be used to somehow protect FPGA ports against damage, in the case the

LCD comes as a plug-in component, and/or if the same LCD signals are available as general purpose user I/Os

(it's easier and cheaper to replace a small buffer chip than the FPGA).