Qsys component stuck issue (AVMM to AXI bridge)

Hi,

I'm experiencing similar issue.

I have AXI master with burst capabilities, which connects to PCIe txs slave.

I got issues with QSYS interconnect so I removed any CDC and width change so that QSYS will only do AXI to Avalon adapter.

I see issue that after first read, write, I get the fabric stuck, because the ARvalid coming from my master is not passing the interconnect towards the PCIe- in signal tap I see that read_i is never asserted.

Please assist! This is an example of Intel design and IP cores that is NOT FUNCTIONAL.