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Altera_Forum
Honored Contributor
Honored ContributorProblems with altera_reserved_tck
I have a Nios II system with level 1 JTAG debug module and I'm having alot of problems with altera_reserved_tck. I've included the sdc constraints for the JTAG module suggested by the time quest cook...
Altera_ForumHonored Contributor
Honored ContributorJust an ignorant question: Are there any indications, that the JTAG interface actually needs timing constraints? In my opinion, it's effectively impossible to create timing violations with the 6 MHz USB Blaster TCK, unless adding inappropriate clock buffers or simiar.
