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Honored Contributor
16 years ago1. check the MSEL pin. It should not use compressed.
2. It supports both. PFL in MAX2 device is used to load FPGA data out from Flash where as FPGA base PFL will be allow you to write FPGA data into Flash 3. The option bit address is 0x18000, first page of FPGA data should be 0x20000, second page should be 0xC20000. You should be able to change address for each page, it will be written as option bit.