Problems uploading flash memory -- part 2

Hi

We have the same problem as described in original post by Eric Harris - unable to program working design into Stratix IV GX FPGA Development Kit via web portal.

We tried to convert with sof2flash from QuartusII 9.0 SP2 as well as QuartusII 9.1 - it makes no difference.

So the questions except the obvious "what's the easiest way to make things work?" are:

1. Should we check on "compressed bitstream" checkbox on setting/Device&Pins Options/Configuratiob tab or better keep it unchecked?

2. Does Development Kit in question support the "Parallel Flash Loader" described in AN386 or the "FPGA-Based Parallel Flash Loader" described in AN478? Or both? Or neither?

3. If it supports PFL from AN386 then where exactly should we specify the address of the user hardware image in the flash memory (0x2c0000)? Convert programming files dialog doesn't get me to change the address of the sof.

4. If it supports PFL from AN478 then I'd like to get precompiled image of FPGA with PFL. Or, at least the ready-made project that I could easily compile.

Now rant on.

5. Why the user guide so f****ing unusable when it comes to flash programming methods others than BUP?

6. How 9.1 was shipped with such an obvious bug? Nobody in Altera's QA never attempted to burn a user image into the flash with the only method officially recommended in the user guide?

7. Why the problem is not documented in the latest release notes?

8. Why patch 73 is not available for free download on Altera web site?