Forum Discussion
Altera_Forum
Honored Contributor
15 years agoWhat is the pin, and device you are using and the exact FPGA development board you are using?
It sounds like you are trying to drive a higher current load than the output can handle.. Typically you will not get 2.5 and 0, because there is still the transistor drop to consider, but the 2.5 CMOS output should still be able to proved 2.0 and 0.4 at it's state current drive strength. If you are attempting to drive a higher load current then the rated level, then 1.9 and 0.9 levels are possible. Pete