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PedroJServian's avatar
PedroJServian
Icon for New Contributor rankNew Contributor
1 year ago
Solved

Problem with the clock of the 10M08SCE144

Good morning, colleagues, I'm designing an FPGA to make a dead time and minimum pulse program for PWM signals coming from a uC. I performed a testbench of the design of these entities and they worke...
Board Debug
  • FvM's avatar
    FvM
    1 year ago

    Hi,

    internal oscillator has an only roughly defined frequency, datasheet says min. 55, typ. 82, max. 116 MHz. Measured 84 MHz corresponds nicely to typical value. Specifying a different value in component instantiation has no effects on hardware, only in simulation.

    To understand why you see sine waveform on oscilloscope, we need to know about IO standard and probing details. Unloaded pin waveform is basically a square wave, I guess you have low drive strength (e.g. 2 mA) and high load capacitance, e.g. 1:1 passive probe or direct connected coax cable.

Farabi_Altera's avatar
Farabi_Altera
Icon for Regular Contributor rankRegular Contributor
1 year ago

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