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Altera_Forum's avatar
Altera_Forum
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16 years ago

Problem in using PLL

Hi,I am using this chip Cdcs502 from Ti.I am running a 27Mhz crystal and connecting Capacitor load of 35pF ,with FS=0,the output is a clock pulse with 0.8 low and 2.1 high,i think this is fine.But th...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

According to the datasheet, CDCS502 has 32 ohm driver impedance. It should be able to drive regular capacitive loads. However I don't have the chip and check it's behaviour.

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with FS=0,the output is a clock pulse with 0.8 low and 2.1 high,i think this is fine.

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This is far from keeping LVCMOS level specification. Sounds like you connected a heavy resistive load to output, you should operate it basically unloaded.