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Altera_Forum
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16 years ago

Problem in using PLL

Hi,I am using this chip Cdcs502 from Ti.I am running a 27Mhz crystal and connecting Capacitor load of 35pF ,with FS=0,the output is a clock pulse with 0.8 low and 2.1 high,i think this is fine.But th...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

well i have checked the oscilloscope and probing method...i dnt think anything wrong with these