Forum Discussion
JohnT_Altera
Regular Contributor
5 years agoHi Maurizio,
May I know what is the clk frequency and setting used? Have you tried the design from https://fpgacloud.intel.com/devstore/platform/18.0.0/Standard/generic-serial-flash-interface-intel-fpga-ip-core-reference-design/https://fpgacloud.intel.com/devstore/platform/18.0.0/Standard/generic-serial-flash-interface-intel-fpga-ip-core-reference-design/?