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NM11's avatar
NM11
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2 years ago

Power Sequence of Arria V GX (FPGA)

We are using Arria V GX (FPGA) in a prototype we are considering developing. I have 3 technical questions about Power Sequence. 1. In the Arria V Device Datasheet, at the end of Table 3 of 1.1....
lixy's avatar
lixy
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2 years ago

Hi Naoki,


This waveform has obvious drop, which does not met the recommended "monotonic" standard.

We do not recommend device working under such power-up condition.

This may decrease the stability of configuration.


Thanks & Regards,

Xiaoyan


  • NM11's avatar
    NM11
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    2 years ago

    Hi Xiaoyan-san,

    Thank you very much for your reply.
    Let me confirm two points.

    1. There are some parts like this that are not monotonic, but these seem to depend on other power supplies that are input to the FPGA.
    Please see the attached file. Waveforms are added in the lower left corner.
    The Intermediate voltage of "VCC_2V5" and "VCC_1V5_FPGA" is generated when "VCC_1V15" is turned on.
    In the electrical circuit, these power supplies are only connected within the FPGA.
    So we intend to set the power supply from our system to the FPGA as specified.

    2. What are the specific events you are referring to below?

    For example, does the FPGA not work at all?
    (The output signal from the FPGA does not change when a signal is input.)

    We have built a prototype using about 100 of these FPGAs, and there does not seem to be any failure.
    Is this a very rare event that can be resolved by rebooting?

    Best Regards,

    Naoki

    • NM11's avatar
      NM11
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      2 years ago

      Hi Xiaoyan-san,

      I am sorry.
      Let me add a few things.

      I am referring to the following in 2.

      > This may decrease the stability of configuration.

      Best Regards,

      Naoki