Forum Discussion
Mani
New Contributor
New ContributorPlease provide recommendation on which IP/protocol to use for inter-FPGA connectivity while developing prototyping system based on multiple Stratix10 FPGAs - i.e. somthing functionally similar to Xilinx's chip2chip interface IP. Thanks.
Deshi_Intel
Regular Contributor
Regular ContributorHI,
It really depends on your project application requirement.
Intel FPGA doesn't has unique IP core to FPGA to FPGA data transfer but you can consider using common industrial IP for the same purpose.
For instance :
- For date rate > 1G - You can consider Ethernet IP
- For data rate around 1G - LVDS IP
- For data rate < 1G - Either PHYlite IP or GPIO IP
Thanks.
Regards,
dlim
ManiNew Contributor
New ContributorThanks for your response.
1) Are there are any reference designs or ANs for the 3 options you've suggested; If so, can you please provide the links ?
2) Can we use the Auroro interface IP for chip-to-chip interconnection for Stratix10 FPGAs ? Are there any ref. designs/ANs for that ?
Thanks & regards,
Mani
