PCIe Dev Kit Stratix II GX and the TSE MegaCore

Hi Lerxt and Jacobjones,

I am brand new on this forum, and I am trying to do quite the same type of thing as you are doing, Lerxt, implementing a simple socket server on the SIIGx PCIe board. I am more or less at the same point as you are, so I checked your code and I was wondering about the source clock you are using: shouldn't you use a 100MHz clock instead of the 156.25 Xaui one? On my side, I am using the 100MHz LVDS clock delivered to the SIIGx on A20/A21 pair.

I'll let you know if I manage to make my simple socket server work as well.

Sophie