PCIe Dev Kit Stratix II GX and the TSE MegaCore

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I'm using the an517 tutorial, making the modifications to PCIe Dev Kit, and now I have this problem:

PS: I didn't connect the TSE module yet, I'm just trying to configure the DDR2 correctly first.

Altera says this abou this erro:

http://www.altera.com/support/kdb/solutions/rd07272007_849.html

But I realy don't know...

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While the Altera's explanation is more towards software, there is a high chance that you got this error as Nios was unable to get a clock signal. Check if the clock connection to board/FPGA is fine.