PCI Express Dev. Board (Stratix II GX) with Core problems

Well, several problems might be involved.

To have a working instantiation of the PCIe Core I needed to connect one of the test signals.

Then with a self-written driver I was able to send data to the card & the rx_st_sop signal would indicate reception of data.

....

I just looked up the signal. The name is test_in and I had to apply this:

test_in(4 downto 0) <= std_logic_vector'("01000");

Also ensure that you reset according to the specified reset_times, 16/1024 cycles IIRC.

Regarding the configuration problem:

In case you want to have your design loaded before BIOS does the PCI initialization you will have to load it to the flash.

This can be done with urJTAG for example or you can go the Altera way.

But I have not done too much with the PCIe core since we moved away from it.

Hope that helped a little.

Cheers,

Daniel