Partial Reconfiguration in DE2

I see, so the Stratix V that will support the partial reconfiguration is not yet in the market. Okay, thanks.

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In so far it's clear, that total reconfiguration is the only option at present. What do you want to achieve with Cyclone II? Use it as a reconfiguration controller or is it the device to be reconfigured?

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Well, I only have one board and one Cyclone II and the system needs an FPGA implementation (HDL) of JPEG compression that will compress image data and controller for the user interface, peripherals and memory that is implemented in NIOSII + Avalon Bus.

There are 2 problems encoutnered:

1. The Cyclone II of the DE2 board only has 33,000 LEs available and the JPEG implementation we have compiled to 45,000 LEs. (Not including the NIOSII controller, interfaces to peripherals)

2. Since the system is an image processing platform, JPEG compression will not be the only algorithm used therefore if the user wanted to use another algorithm say bmp compression then the JPEG compression should be replaced by bmp compression at run time. This means that the NIOSII controller + interfaces + memory modules will not be changed, only the compression block.

This is why partial reconfiguration was discussed, but since it is not yet a feature in Altera devices, I need a way to implement this.

I am considering the following:

1. PC to DE2 Board interface: A software will configure the whole FGPA everytime a different compression is chosen

2. Scan chain: as suggested by daniel.kho, implement a scan chain that will load the bit stream to a part of the FGPA to change the configuration of that part. is this considered as partial, if yes, can it be done?

3. Use 2 boards: 1 for the controller, 1 for the image processing.

basically, what other ways are there in doing this kind of system?

I hope I was able to make it clearer :)

Thank you for your help.