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antonto's avatar
antonto
Icon for Occasional Contributor rankOccasional Contributor
2 years ago
Solved

On board 2 bit input

Hello, I have the MAX 10 DE-LITE board and im trying to create for example a simple mux on a hardware level so i can run it on the board. So after creating a GOLDEN TOP sv file my problem is how can...
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  • ShengN_altera's avatar
    ShengN_altera
    2 years ago

    Hi,


    The error occurs because of this line input logic sel [1:0], in Task2 module due to unpacked array.

    Have to change to packed array input logic [1:0] sel,


    Thanks,

    Best Regards,

    Sheng


antonto's avatar
antonto
Icon for Occasional Contributor rankOccasional Contributor
2 years ago

Thank you for your time.

Im getting this error
Error (10928): SystemVerilog error at DE10_LITE_Golden_Top.v(136): packed array type cannot be assigned to unpacked array type - types do not match

and this one

Error (10716): SystemVerilog error at DE10_LITE_Golden_Top.v(136): can't pass value from actual to formal input "sel" with incompatible type

Same with the other answer from Sstrell

sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
2 years ago

You would need to show your top-level code to understand why the I/O is not matching the sel data type.