Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Off Chip Memory Issue (DSP Dev board)

Hi, I'm having a bizarre issue with the DSP development board (Stratix II S180) and wanted to get some opinions on it. I use the SRAM and sometimes when I compile the project it will work just ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

This shows that when your signals are stable on a longer period than one read cycle, everything is fine. Timing issues can be an explanation for that.

Could you put some Signaltap probes on the signals and see what's happening?