Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Off Chip Memory Issue (DSP Dev board)

Hi, I'm having a bizarre issue with the DSP development board (Stratix II S180) and wanted to get some opinions on it. I use the SRAM and sometimes when I compile the project it will work just ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
16 years ago

Thanks for the input.

My first thought was a timing issue of some sorts. However, I can send a read command for 10 consecutive cycles (i.e. same address and control bits held for ten cycles) and it still behaves the same way. It is a low speed design (70 MHz) so this should meet all timing requirements by a large margin.