NoC Initiator Bandwidth

Hi ginger919,

You can find out how the link between NoC initiator and Switch is from this Chapter in Intel Agilex® 7 M-Series FPGA Network-on-Chip (NoC) User Guide: https://www.intel.com/content/www/us/en/docs/programmable/768844/23-2/noc-switch-and-link-detail.html

"Each of the NoC initiator bridges connect with all four high-speed links."

"Two links (LR0 and LR1) carry traffic left-to-right.

The other two links (RL0 and RL1) carry traffic right-to-left."

I guess the "Figure 11" leads to some misunderstandings. According to this Chapter: https://www.intel.com/content/www/us/en/docs/programmable/768844/23-2/initiator-and-target-bandwidth-cons.html , the NoC Initiator Bus is typically 32Bytes, which means 256 bits in total, instead of separate 256-bit Read and 256-bit Write. Therefore, in PTC tool, Read and Write bandwidth sum can not exceed 100%.

Thanks & Regards,

Xiaoyan