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aamodini's avatar
aamodini
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2 years ago

Nios to FPGA Avalon-MM

I want to transfer data from Nios (host) to a custom agent component on the FPGA through Avalon-MM interface. But, the host and agent operate at different clock speeds. How to facilitate data transfe...
Fpga Devkit
sstrell's avatar
sstrell
Icon for Super Contributor rankSuper Contributor
2 years ago

In Platform Designer, just connect them together. The generated interconnect will automatically include CDC logic, either a FIFO or handshaking, depending on the options you set in PD (I think it's Interconnect Requirements in Standard and the Domains tab in Pro).

If you want more control, you can manually add/insert an Avalon clock crossing bridge from the IP Catalog.

  • aamodini's avatar
    aamodini
    Icon for New Contributor rankNew Contributor
    2 years ago

    I am trying to use the Avalon-MM Clock Crossing Bridge, but am confused regarding a few connections on PD.

    m0_clk and m0_reset are connected to the Nios processor clk and reset respectively (125 MHz) and s0_clk is connected to the clock bridge at 100 MHz. avalon_slave_0 is my custom Avalon-MM slave component. How should s0 and m0 interfaces be connected, if Nios is the host and avalon_slave_0 is the agent?