Nios II System Architect Design Tutorial problem

Yes I can see instantiating the system using schematic entry being painful...... There are improvements happening to make this far less painful so it will get better (much better actually). That said, I used to be a big time schematic entry designer and after learning verilog I'm never going back so maybe you'll benefit from doing the same. I know new things (boooo!) but HDL can be a big time saver so any time to learn new productivity techniques is a good thing if you ask me.

For the record I went from VHDL --> Schematic Entry --> Verilog so it wasn't like I only knew schematic entry when transiting to verliog HDL. That said anything I design these days I still write it down on a white board/napkins just like I did in my schematic days because having schematic entry knowledge I think is still important since it makes you think more about what you will end up with out of synthesis. Unfortunately a lot of people don't dabble in schematic entry anymore so it's becoming a lost art..... I still trust schematic folks to design something right the first time :)